Experiment No. 3 bsc.3nd semester
(To study and verify the truth table of x - OR , x - NOR gate . )
Object
To study and verify the truth table I XOR gate and NOR
gate .
Apparatus Required
Bread board connecting wires DC power supply
. logic gate .
Theory
Logic gate are electronic circuits which performs logic funcations or are one or more inputs to produce one output the input / output
combination I gates is called truth table .
Exclusive OR Gate
XOR gate is a logic gate the gives a truth
output . when the number I true OR from mathematical logic … that is a true
output results if one and any one I the inputs to the gate is true if both
inputs are false or both are true a false output results . An XOR gate is
obtained by using OR , AND one Output .
The Boolean expression for
the XOR gate is .
Y = A . B Bar + Ᾱ . B
Exclusive NOR Gate
X NOR is
digital logic gate that outputs true (1) , when an even number I true
inputs are present . it produces a true output if both I it inputs are the same
( either both true or both false . )
This gate also has two inputs
and one output it is a combination I XOR gate followed by an inverter Boolean
expression for X NOR gate is .
Y = A .B + Ᾱ . B Bar
Observation
1.
The truth table
for XOR gate
|
Input |
Output |
||
|
A |
B |
Y = A + B |
|
|
0 |
0 |
0 |
|
|
0 |
1 |
1 |
|
|
1 |
0 |
1 |
|
|
1 |
1 |
0 |
|
2.
The truth table
for XOR gate
|
Input |
Output |
||
|
A |
B |
Y = A .B ( Bar ) |
|
|
0 |
0 |
1 |
|
|
0 |
1 |
0 |
|
|
1 |
0 |
0 |
|
|
1 |
1 |
1 |
|
Result
The truth table I both the
gates ( XOR and XNOR ) have been respectively .
Precautions
1.
The apparatus
should work properly .
2.
The wire should
be checked before use .
3. All conditions should be clear and handle it carefully.
Note.
(Please note: if a particular experiment is not visible, please search for it using the search box—for example, Experiment No. 4. (To verify NAND gate as universal gate .
कृपया ध्यान दीजिये अगला एक्सपेरिमेंट न दिख रहा हो वो आप सर्च बॉक्स में सर्च कर लीजिये . जैसे , एक्साप्रिमेंट नंबर.4 या फिर To verify NAND gate as universal gate .

